Tuesday, March 06, 2007

Rambus Inc. patents delay?

FinzToRite, in the midst of his weekly patent search, discovered that Rambus Inc. has two new patents. The first by Dally, et al. It struck FTR that Rambus had done it - they had patented dallying. Not only was Rambus Inc. giving its own shareholders the proverbial middle finger, it was patenting the process!

FTR, shook his head and his vision cleared . . .

United States Patent 7,187,721
Dally, et al. March 6, 2007

Transition-time control in a high-speed data transmitter

Transition time of a data signal is controlled by applying different delays to the data signal and combining the delayed data signals. The transition time of the data output is determined by difference in delays applied to the data input and may be proportional to bit time of the bit clock. The data input may be applied directly to the delay elements or may be clocked by clock signals delayed by the delay elements. The delayed data is applied to parallel driver circuits. Supply voltage to the delay elements can be controlled to compensate for production and environmental variations. The supply voltage controller includes parallel delay elements of different delays and a phase comparator, the output of which controls the supply voltage applied to the delay elements.

Inventors: Dally; William J. (Stanford, CA), Poulton; John W. (Chapel Hill, NC)
Assignee: Rambus Inc. (Los Altos, CA)
Appl. No.: 09/557,164
Filed: April 25, 2000


United States Patent 7,187,572
Perego, et al. March 6, 2007

Early read after write operation memory device, system and method

A memory device, system and method for allowing an early read operation after one or more write operations is provided according to an embodiment. The memory device includes an interface for providing a first write address, a first write data, and a read address. A memory core is coupled to the interface and includes a first memory section having a first data path and a first address path and a second memory section having a second data path and a second address path. In an embodiment of the present invention, the first data and first address path is independent of the second data and second address path. The first write data is provided on the first data path responsive to the first write address being provided on the first address path while a read data is provided on the second data path responsive to the read address being provided on the second address path.

Inventors: Perego; Richard E. (San Jose, CA), Ware; Frederick A. (Los Altos Hills, CA)
Assignee: Rambus Inc. (Los Altos, CA)
Appl. No.: 10/353,405
Filed: January 29, 2003

HT FinzToRite.

1 comment:

Threejack said...

Hey Treowth,

Now, if the other half of that EE tandem can get it done, Rambus can file a patent on behalf of Dilly Dallyin' :-)

Lord knows, Rambus has experience with it.


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