The anticipated Intel Developers Forum "here is our latest" press release from Rambus Inc. has arrived on the Internet (but not in my email box - what's with that?) and it is not a disappointment.
Rambus Showcases Silicon Verified Demo Compliant with Gen2 Revision 0.5 Specification for PCI Express
Seamlessly integrated digital controller and PHY solution for next generation PC and peripheral interconnect
The Gen2 demo shows a PCI Express PHY implemented in TSMC's 90nm GT process technology. Demo features include:***
5.0 Gbps transfer rate, shown in x1 lane width
"Board-to cable-to board" data transfers
Scope showing PHY eye diagram
DLL and TL transactions demonstrated with LeCroy protocol analyzer
Digital controller for expected PCI Express Gen2 specification (Data Link Layer and Transaction Layer) demonstrated in FPGA
Sign up for Rambus Inc. press releases here at Rambus Inc. - generally they do arrive faster than the options backdating investigation report . . . which is being released this week?
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