Monday, September 17, 2007

Rambus Inc. at IDF

On September 18-20, 2007, Rambus Inc. will be pimping in San Francisco at the Intel Developer Forum:

XDR memory architecture, a differential memory system solution with performance ranging from 3.2 to 8.0GHz. Technology demonstration running at 3.2GHz with FlexPhase™ circuit technology and Octal Data Rate (ODR) operation.

DDR technology performing memory transactions to and from a DDR2 device operating at 800Mbps (400MHz clock).

Low power signaling technology operating at 6.25 Gbps with a power-performance metric of 2.2 mW/Gbps.

A PLAYSTATION®3 (PS3™) open demo board, featuring the XDR memory architecture. The Rambus XDR memory interface and FlexIO™ processor bus on the Cell Broadband Engine™ enable an unprecedented aggregate bandwidth of over 65GB/s in the PS3.

TI DLP® projector open demo board, featuring the XDR memory architecture. This architecture, including XDR DRAM, XDR memory controller (XMC), XDR IO cell (XIO), and XDR clock generator (XCG), delivers memory bandwidth up to 8.0 GB/s in the latest generation of HD front projectors.

Press release

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