IBM promoting Cell

Daniel Drew Turner writing for PC Magazine reports that IBM engineers briefed In-Stat Fall Microprocessor Forum attendees on chip design and optimizing multiple application proformance.

David Krolak, the lead IBM engineer on the Cell project, noted the Cell will use two Rambus I/O controllers and a Rambus Dual XDR memory controller. The aggregate memory data bandwidth will be 25.6G Bps in each direction.

"The Cell provides massive computational capacity and huge communicational bandwidth," said Alex Chow, a design manager from IBM's System and Technology group, who spoke on programming models for the Cell.

Read the entire article at PCMag.com here.

H/T FinzToRite