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United States Patent 6,931,467

Barth, et al. August 16, 2005

Memory integrated circuit device which samples data upon detection of a strobe signal

Abstract
A system and method for performing data transfers within a computer system is provided. The system includes a controller configured to dynamically adjust the interleave of the communications required to perform a series of data transfer operations to maximize utilization of the channel over which the communications are to be performed. The controller is able to vary the time interval between the transmission of control information that requests a data transfer and the performance of the data transfer by signaling the beginning of the data transfer with a strobe signal sent separate from the control information. The controller is able to defer the determination of how much data will be transferred in the operation by initiating the termination of a data transfer with a termination signal. The method provides a technique for distinguishing between identical control signals that are carried on the same line. The system includes a memory device with control circuitry that allows no more than one memory bank powered by any given power supply line to perform sense or precharge operations.

Inventors: Barth; Richard Maurice (Palo Alto, CA); Ware; Frederick Abbot (Los Altos Hills, CA); Dillon; John Bradly (Palo Alto, CA); Stark; Donald Charles (Woodside, CA); Hampel; Craig Edward (San Jose, CA); Griffin; Matthew Murdy (Mountain View, CA).

Assignee: Rambus Inc. (Los Altos, CA)

Appl. No.: 094547

Filed: March 8, 2002