United States Patent 6,912,620
Ware , et al.
June 28, 2005
Memory device which receives write masking information
Abstract
A method is described for providing a memory with a serial sequence of write enable signals that are offset in time with respect to respective data received by a plurality of data inputs of the memory. A memory is also described with an array for data storage, a plurality of data input pins, and a separate pin for receiving either additional data or a serial sequence of write enable signals applicable to data received by the plurality of data input pins. The additional data that the separate pin can receive includes, for example, error detection and correction (EDC) information. A method is also described for multiplexing write enable information and error detection and correction information.
Inventors:
Ware; Frederick Abbott (Los Altos Hills, CA); Hampel; Craig Edward (San Jose, CA); Stark; Donald Charles (Woodside, CA); Griffin; Matthew Murdy (Mountain View, CA)
Assignee: Rambus Inc. (Los Altos, CA)
Appl. No.: 686318
Filed: October 15, 2003
Hat tip to FinzToRite of the Pinehurst Thread for the link.
Tuesday, June 28, 2005
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