New Rambus Patent - (Ramboids wonder who will try to steal it first?)*

United States Patent: 6,864,896

Perego
March 8, 2005
Scalable unified memory architecture

Abstract

A memory architecture includes a memory controller coupled to multiple modules. Each module includes a computing engine coupled to a shared memory. Each computing engine is capable of receiving instructions from the memory controller and processing the received instructions. The shared memory is configured to store main memory data and graphical data. Certain computing engines are capable of processing graphical data. The memory controller may include a graphics controller that provides instructions to the computing engine. An interconnect on each module allows multiple modules to be coupled to the memory controller.

Inventor: Perego; Richard E. (San Jose, CA)

Assignee: Rambus Inc. (Los Altos, CA)

Appl. No.: 858836

Filed: May 15, 2001

Summary

The systems and methods described herein achieve these goals by supporting the capability of locating certain processing functions on the memory modules, while providing the capability of partitioning tasks among multiple parallel functional units or modules.

Hat tip to FinzToRite of the Pinehurst Thread.

*Hat tip to the collective Pinehurst Thread for the question "Who will try to steal it first?" A query I have read scores of times over the years.